OneChipMSX on C3 board
Project: OneChipMSX on C3 board.
back to C3 board, main OneChipMSX page.
local links
c1, e1, Altera Quartus II Fedora, FreeBSD,
History
2021-10-10: I re-created this page on my self-hosted web server.
2018-09-12: e1 - I tried the DE1 variation as well, changed device, clear pin assignments, test compile. got an error
Error (169282): There are 257 IO output pads in the design, but only 133 IO output pad locations available on the device.
disabled flash, SRAM, GPIO and then the project fits. fitter summary
Fitter Status : Successful - Wed Sep 12 16:36:57 2018 Quartus II 32-bit Version : 13.1.4 Build 182 03/12/2014 SJ Web Edition Revision Name : OCMSX Top-level Entity Name : DE1_Toplevel Family : Cyclone III Device : EP3C25Q240C8 Timing Models : Final Total logic elements : 12,991 / 24,624 ( 53 % ) Total combinational functions : 11,814 / 24,624 ( 48 % ) Dedicated logic registers : 5,387 / 24,624 ( 22 % ) Total registers : 5387 Total pins : 138 / 149 ( 93 % ) Total virtual pins : 0 Total memory bits : 198,610 / 608,256 ( 33 % ) Embedded Multiplier 9-bit elements : 18 / 132 ( 14 % ) Total PLLs : 1 / 4 ( 25 % )
good.
2018-09-12: e1 - I set up the OneChipMSX project, selected the MIST project, changed device, cleared all pin assignments and did a test compile. directory:
[tingo@kg-elitebook OneChipMSX_c3]$ pwd /home/tingo/personal/projects/fpga/Altera/c3/OneChipMSX_c3
fitter summary
Fitter Status : Successful - Wed Sep 12 16:00:54 2018 Quartus II 32-bit Version : 13.1.4 Build 182 03/12/2014 SJ Web Edition Revision Name : OCMSX Top-level Entity Name : MIST_Toplevel Family : Cyclone III Device : EP3C25Q240C8 Timing Models : Final Total logic elements : 14,697 / 24,624 ( 60 % ) Total combinational functions : 13,151 / 24,624 ( 53 % ) Dedicated logic registers : 6,532 / 24,624 ( 27 % ) Total registers : 6599 Total pins : 73 / 149 ( 49 % ) Total virtual pins : 0 Total memory bits : 219,346 / 608,256 ( 36 % ) Embedded Multiplier 9-bit elements : 18 / 132 ( 14 % ) Total PLLs : 1 / 4 ( 25 % )
ok.