multicomp on C3 board

Project: testing out Multicomp on the C3 board

jtag setup

cable FT2232 vid=0x0403 pid=0x6010
bsdl path /home/tingo/doc/Altera/docs/fpga/Cyclone_III/bsdl/
bsdl path /home/tingo/doc/Altera/docs/fpga/bsdl/
detect

svf ./whatever/file.svf

back to C3 board, main multicomp page.

links

wsoltys/multicomp, Grant Searle's Multicomp (6502.org thread), nealcrook/multicomp6809, Z80 BASIC on a Cyclone IV FPGA, tinyload - A bootloader for 6502-based systems with support for the FAT16 file system and a small footprint,

cores: OpenCores - NextZ80 (Stardot thread), Arlet's 6502 core (6502.org: 65C02 in verilog - extended version of Arlet's core), AlanD's R65Cx2, MichaelM's M65C02 Microprocessor Core, M65C02A, robfinch/Cores (and Project area), MCL65, FreeCores FreeCores: pdp1, pdp8, pdp8/l, w11,

test / verification: UVVM,

other links

FPGA-FAQ, Create your own Version of Microsoft BASIC for 6502, Microsoft BASIC for 6502, PyAsm65 - simple assembler for M65C02A in Python, 6502_EhBASIC, 6502TestPrograms, Arlet's SDRAM controller, fpga4fun Creating a VGA video signal from FPGA pins, SD card, SDRAM controller, VGA Primer, VgaSim - VGA simulator, VHDL Tutorial, FUZIX - can run on a 6809 multicomp, Commodore PET in FPGA,

other other links

UnitJuggler ns to MHz, CamelForth, CUBIX: users guide, programming guide, OSI BASIC - Dave's OSI page, FLEX - FLEX User Group,

local links: c1, e1, Altera Quartus II Fedora, FreeBSD,

History

2021-10-03: I re-created this page on my self-hosted web server.

2018-09-06: e1 - multicomp6809 - I added VGA and ps/2 assignments, set up with io1 as VGA and PS/2, and io2 (and io3) as serial - test - it works. Doesn't have "select console" code though. And colors work on the VGA from CamelForth with the correct invocation words. Cool.

2018-09-06: e1 - multicomp z80 - CP/M - testing with io1 set to serial and io2 set to VGA and PS/2 keyboard. That works too. after you have selected console ("Press [SPACE] to activate console"), the other interface goes dead, as expected.

2018-09-06: e1 - multicomp z80 - CP/M - testing with io1 set to VGA and PS/2 keyboard, yes it works. Nice.

2018-09-06: e1 - multicomp z80 - VGA adapter pin assignments

pin 22 videoR0
pin 38 videoR1
pin 41 videoG0
pin 44 videoG1
pin 46 videoB0
pin 50 videoB1
pin 52 hSync
pin 56 vSync
pin 39 GND

2018-09-06: e1 - multicomp z80 - PS/2 adapter pin assignments

pin 39 - ps2Data
pin 43 - ps2Clk

GND and 3V3 from SD board.

2018-09-03: e1 - multicomp6809 - test basic

OK BASIC 6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK

buggy

OK BUGGY BUGGY for Multicomp09, 2016Feb11 (type h for help)
.

CamelForth

OK SDFORTH 6809 CamelForth v1.1  20 Mar 16

OK

Cubix

OK CUBIX RAM... Passed

CUBIX version 1.3 

Copyright 1983-2005 Dave Dunfield
All rights reserved

*

Flex

OK FLEX FLEX......................
FLEX 9.1

DATE (MM,DD,YY)?
DATE (MM,DD,YY)?
DATE (MM,DD,YY)? 09,03,18

+++date
SEPTEMBER 3, 2018
(but it is unstable, many times it hangs on the date line)

NitrOS9

OK NITROS9 NITROS9 BOOTKREL Boot Krn tb0...........................................................................................bKrnP2 IOMan Init RBF mc09sd DD D0 D1 D2 D3 SCF mc6850 Term T0 T1 PipeMan Piper Pipe Clock Clock2 Shell Date DeIniz Echo Iniz Link Load Save Unlink i2xoCNitrOS-9/6809 Level 2 V3.3.0
Multicomp09
(C) 2014 The NitrOS-9 Project
**   DEVELOPMENT BUILD   **
** NOT FOR DISTRIBUTION! **
Thu Apr 20 20:51:37 2017
http://www.nitros9.org

hangs here

2018-09-03: e1 - multicomp6809 - test the SD card again. First card

OK HEX
OK 200 80 DUMP
0200  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0210  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0220  53 59 53 54 45 4D 00 00  48 45 4C 50 00 00 00 00  SYSTEM..HELP....
0230  45 58 45 00 25 B7 00 F0  00 00 00 00 00 00 00 00  EXE.%...........
0240  48 45 4C 50 00 00 00 00  53 59 53 54 45 4D 00 00  HELP....SYSTEM..
0250  48 4C 50 00 27 20 00 F0  00 00 00 00 00 00 00 00  HLP.' ..........
0260  53 59 53 54 45 4D 00 00  43 4F 50 59 00 00 00 00  SYSTEM..COPY....
0270  45 58 45 00 29 00 00 F0  00 00 00 00 00 00 00 00  EXE.)...........
OK 0 200 SDRD
OK 200 80 DUMP
0200  00 41 49 4E 00 00 00 00  42 4F 4F 54 47 45 4E 00  .AIN....BOOTGEN.
0210  45 58 45 00 24 00 00 F0  00 00 00 00 00 00 00 00  EXE.$...........
0220  53 59 53 54 45 4D 00 00  48 45 4C 50 00 00 00 00  SYSTEM..HELP....
0230  45 58 45 00 25 B7 00 F0  00 00 00 00 00 00 00 00  EXE.%...........
0240  48 45 4C 50 00 00 00 00  53 59 53 54 45 4D 00 00  HELP....SYSTEM..
0250  48 4C 50 00 27 20 00 F0  00 00 00 00 00 00 00 00  HLP.' ..........
0260  53 59 53 54 45 4D 00 00  43 4F 50 59 00 00 00 00  SYSTEM..COPY....
0270  45 58 45 00 29 00 00 F0  00 00 00 00 00 00 00 00  EXE.)...........

that looks ok. scramble buffer

OK 200 80 AA FILL

take out and insert card (without touching the "click"), the try again

OK 0 200 SDRD

the machine hangs, with driveLED on. Aha, everytime I switch cards I have to reset the machine. after that it works

OK HEX
OK 200 80 DUMP
0200  00 41 49 4E 00 00 00 00  42 4F 4F 54 47 45 4E 00  .AIN....BOOTGEN.
0210  45 58 45 00 24 00 00 F0  00 00 00 00 00 00 00 00  EXE.$...........
0220  53 59 53 54 45 4D 00 00  48 45 4C 50 00 00 00 00  SYSTEM..HELP....
0230  45 58 45 00 25 B7 00 F0  00 00 00 00 00 00 00 00  EXE.%...........
0240  48 45 4C 50 00 00 00 00  53 59 53 54 45 4D 00 00  HELP....SYSTEM..
0250  48 4C 50 00 27 20 00 F0  00 00 00 00 00 00 00 00  HLP.' ..........
0260  53 59 53 54 45 4D 00 00  43 4F 50 59 00 00 00 00  SYSTEM..COPY....
0270  45 58 45 00 29 00 00 F0  00 00 00 00 00 00 00 00  EXE.)...........
OK 0 200 SDRD
OK 200 80 DUMP
0200  C3 5C D3 C3 58 D3 7F 00  43 6F 70 79 72 69 67 68  .\..X...Copyrigh
0210  74 20 31 39 37 39 20 28  63 29 20 62 79 20 44 69  t 1979 (c) by Di
0220  67 69 74 61 6C 20 52 65  73 65 61 72 63 68 20 20  gital Research 
0230  20 20 20 20 00 00 00 00  00 00 00 00 00 00 00 00      ............
0240  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0250  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0260  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0270  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

test the other card

OK HEX
OK 200 80 DUMP
0200  C3 5C D3 C3 58 D3 7F 00  43 6F 70 79 72 69 67 68  .\..X...Copyrigh
0210  74 20 31 39 37 39 20 28  63 29 20 62 79 20 44 69  t 1979 (c) by Di
0220  67 69 74 61 6C 20 52 65  73 65 61 72 63 68 20 20  gital Research 
0230  20 20 20 20 00 00 00 00  00 00 00 00 00 00 00 00      ............
0240  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0250  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0260  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0270  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
OK 0 200 SDRD
OK 200 80 DUMP
0200  00 41 49 4E 00 00 00 00  42 4F 4F 54 47 45 4E 00  .AIN....BOOTGEN.
0210  45 58 45 00 24 00 00 F0  00 00 00 00 00 00 00 00  EXE.$...........
0220  53 59 53 54 45 4D 00 00  48 45 4C 50 00 00 00 00  SYSTEM..HELP....
0230  45 58 45 00 25 B7 00 F0  00 00 00 00 00 00 00 00  EXE.%...........
0240  48 45 4C 50 00 00 00 00  53 59 53 54 45 4D 00 00  HELP....SYSTEM..
0250  48 4C 50 00 27 20 00 F0  00 00 00 00 00 00 00 00  HLP.' ..........
0260  53 59 53 54 45 4D 00 00  43 4F 50 59 00 00 00 00  SYSTEM..COPY....
0270  45 58 45 00 29 00 00 F0  00 00 00 00 00 00 00 00  EXE.)...........

works.

2018-09-03: e1 - multicomp6809 - debounce, implemented the same solution as in the 2018-09-01 entry for c1.

2018-09-03: e1 - multicomp6809 - what version of the repository data

[tingo@kg-elitebook multicomp6809]$ git status
On branch master
Your branch is up to date with 'origin/master'.

nothing to commit, working tree clean
[tingo@kg-elitebook multicomp6809]$ git rev-parse --short HEAD
9a0431b

ok, so latest.

2018-09-02: c1 - multicomp6809 - ok, FLEX is just unstable, it works sometimes:

OK FLEX FLEX......................
FLEX 9.1

DATE (MM,DD,YY)?
DATE (MM,DD,YY)? 09,02,18

+++

try ttyset

+++ttyset
BS = $08
DL = $18
EL = $3A
DP = 0
WD = 0
NL = 0
TB = $00
BE = $08
EJ = 0
PS = ON
ES = $1B
+++

ok. More commands

+++asn
SYSTEM DRIVE IS #0
WORK DRIVE IS #0

date

+++date
SEPTEMBER 2, 2018

good stuff.

2018-09-01: c1 - multicomp6809 - debounce - to debounce the button signal, I adapt Nandland's Debounce A Switch lesson. Set up here

tingo@kg-core1$ ll Components/debounce/*
-rw-r--r--  1 tingo  users  - 1866 Sep  1 19:38 Components/debounce/Debounce_Switch.vhd

In addition to define a new interface signal n_button_in and assigning it to pin 182, I also had to create a new signal in the architecture

     signal d_reset                : std_logic := '1'; -- debounced reset signal, active low

create an instance of the debounce module

-- add debounce of switch
    Debounce_Inst : entity work.Debounce_Switch
     port map(
          i_Clk => clk,
          i_Switch => n_button_in,
          o_switch => d_reset);     

and replace n_reset with d_reset in all instances using it (cpu1, sd1, mm1, gpio1). The last one is not used (yet). I now have a nice debounced reset button. testing, works: BUGGY, SDFORTH, CUBIX (but no files on the drives a: - d:, HELP works), not working: FLEX

OK FLEX FLEX......................
FLEX 9.1

DATE (MM,DD,YY)?

hangs on this prompt not working: NITROS9

OK NITROS9 NITROS9 BOOTKREL Boot Krn tb0...........................................................................................bKrnP2 IOMan Init RBF mc09sd DD D0 D1 D2 D3 SCF mc6850 Term T0 T1 PipeMan Piper Pipe Clock Clock2 Shell Date DeIniz Echo Iniz Link Load Save Unlink i2xoCNitrOS-9/6809 Level 2 V3.3.0
Multicomp09
(C) 2014 The NitrOS-9 Project
**   DEVELOPMENT BUILD   **
** NOT FOR DISTRIBUTION! **
Thu Apr 20 20:51:37 2017
http://www.nitros9.org

hangs here.

2018-09-01: c1 - multicomp6809 - test booting from SD card Buggy

OK BUGGY  BUGGY for Multicomp09, 2016Feb11 (type h for help)
.h

Asm    {Aaddr}
Unasm  {U or Uaddr or Uaddr,length}
Calc   {Chexnum1{+|-hexnum2}}
Dump   {D or Daddr or Daddr,length}
Enter  {E or Eaddr or Eaddr bytes or Eaddr "string"}
Break  {B or Baddr. B displays, Baddr sets or clears breakpoint}
Find   {Faddr bytes or Faddr "string"}
Go     {G or Gaddr}
Inp    {Iaddr}
Jump   {Jaddr}
Move   {Maddr1,addr2,length}
Prog   {P}
Regs   {R or R<letter><hex>}
Srec   {SO<addr> or SS<addr>,<len> or S1<bytes> or S9<bytes>}
Trace  {T}
Xmodem {XSaddr,len XLaddr,len XX XOcrlf,filler, XSSaddr,len}
Help   {H}

.

CamelForth

OK SDFORTH 6809 CamelForth v1.1  20 Mar 16

OK

CUBIX

OK CUBIX RAM... Passed

CUBIX version 1.3 

Copyright 1983-2005 Dave Dunfield
All rights reserved

*

FLEX

OK FLEX FLEX......................
FLEX 9.1

DATE (MM,DD,YY)? 09,01,18

+++

so those work. How about BASIC?

OK BASIC 6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK

it starts. How about NITROS9?

OK NITROS9 NITROS9 BOOTKREL Boot Krn tb0...........................................................................................bKrnP2 IOMan Init RBF mc09sd DD D0 D1 D2 D3 SCF mc6850 Term T0 T1 PipeMan Piper Pipe Clock Clock2 Shell Date DeIniz Echo Iniz Link Load Save Unlink i2xoCNitrOS-9/6809 Level 2 V3.3.0
Multicomp09
(C) 2014 The NitrOS-9 Project
**   DEVELOPMENT BUILD   **
** NOT FOR DISTRIBUTION! **
Thu Apr 20 20:51:37 2017
http://www.nitros9.org

and there it hangs (as expected). FUZIX then?

OK FUZIX FUZIX.....................................................................FUZIX version 0.1
Copyright (c) 1988-2002 by H.F.Bower, D.Braun, S.Nitschke, H.Peraza
Copyright (c) 1997-2001 by Arcady Schekochikhin, Adriano C. R. da Cunha
Copyright (c) 2013-2015 Will Sowerbutts <will@sowerbutts.com>
Copyright (c) 2014-2015 Alan Cox <alan@etchedpixels.co.uk>
Devboot
512kB total RAM, 448kB available to processes (15 processes max)
Enabling interrupts ... ok.
SD: hda: hda1 hda2
ok.
Mounting root fs (root_dev=1, rw): OK
Starting /init
2 buffers reclaimed from discard

and hangs here.

2018-09-01: c1 - multicomp6809 - I configured up Neal Crook's multicomp6809, with console (io1) on serial, using the MicrocomputerPCB RTL. I cloned the Github repository, which is

tingo@kg-core1$ git status
On branch master
Your branch is up to date with 'origin/master'.

nothing to commit, working tree clean
tingo@kg-core1$ git rev-parse HEAD
9a0431bafc717ea0576857d53403900af251ac24
tingo@kg-core1$ git rev-parse --short HEAD
9a0431b

Then I copied files to a new directory structure and created a new project in Quartus II. Compiled ok. Test - no output on serial port. ok, I forgot to change interface2DataOut to interface1DataOut for io1, Fixed. Recompiled, test - yes, now it works. RAM test

6809 CamelForth v1.1  20 Mar 16

OK HEX
OK 0800 DFFF PASS
OK 0800 DFFF 10 PASSES ................

SD card controller test

OK 200 80 DUMP
0200  7F FF F6 B3 79 7F FC 37  DB FF FF F7 FF FE FF FE  ....y..7........
0210  03 5A 48 30 B7 79 11 ED  F9 AC FE 0F A8 94 28 63  .ZH0.y........(c
0220  BD CD F5 EF FF DF FB B3  EF FF FF FF FF FF FD FD  ................
0230  14 A4 98 23 47 4A AF 6B  75 5F CE E4 9D 39 EA 77  ...#GJ.ku_...9.w
0240  B1 D3 B7 F6 FF B2 9F E2  7C 9F FD FF FF FF EF 3F  ........|......?
0250  C1 29 4F CA 18 B9 AE 8E  F7 13 7B DA D4 20 7D 4A  .)O.......{.. }J
0260  F5 FF FF B9 3C E7 FF FE  FF FF DC FD F7 BF FE BF  ....<...........
0270  0C 19 0B B0 33 FA AD 3C  24 FF BF 13 73 A0 61 46  ....3..<$...s.aF
OK 0 200 SDRD
OK 200 80 DUMP
0200  00 41 49 4E 00 00 00 00  42 4F 4F 54 47 45 4E 00  .AIN....BOOTGEN.
0210  45 58 45 00 24 00 00 F0  00 00 00 00 00 00 00 00  EXE.$...........
0220  53 59 53 54 45 4D 00 00  48 45 4C 50 00 00 00 00  SYSTEM..HELP....
0230  45 58 45 00 25 B7 00 F0  00 00 00 00 00 00 00 00  EXE.%...........
0240  48 45 4C 50 00 00 00 00  53 59 53 54 45 4D 00 00  HELP....SYSTEM..
0250  48 4C 50 00 27 20 00 F0  00 00 00 00 00 00 00 00  HLP.' ..........
0260  53 59 53 54 45 4D 00 00  43 4F 50 59 00 00 00 00  SYSTEM..COPY....
0270  45 58 45 00 29 00 00 F0  00 00 00 00 00 00 00 00  EXE.)...........

looks good.

2018-08-31: e1 - multicomp6809 - do a memory test of all the RAM above what CamelForth uses

6809 CamelForth v1.1  20 Mar 16

OK HEX
OK 0800 DFFF PASS
OK 0800 DFFF 10 PASSES ................

it is ok.

2018-08-31: e1 - multicomp6809 - testing the MMU, advice from forum thread: check the MMU for life at all

OK HEX
OK C000 80 DUMP
C000  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C010  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C020  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C030  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C040  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C050  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C060  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
C070  55 55 55 55 55 55 55 55  55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
OK C000 C080 AA FILL �

and here it hangs, it doesn't want to write to C000 area at all. The ROM to RAM copy, remap and jump looks like it works:

OK HEX MMUMAP EFTOCD E000 C000 2000 CMOVE CDTOCD PIVOTRST 6809 CamelForth v1.1  20 Mar 16

but the something is wrong

OK 1234 FFFE ! FFFE 2 DUMP FFFE?

OK FFFE 2 DUMP FFFE?

we'll see what's next. OK, it was a small omission, now fixed

OK HEX MMUMAP EFTOCD E000 C000 2000 CMOVE CDTOCD PIVOTRST 6809 CamelForth v1.1  20 Mar 16

OK HEX 1234 FFFE ! FFFE 2 DUMP
FFFE  12 34 04 44 55 4D 50 20  52 53 54 20 FF DF 07 FC  .4.DUMP RST ....

so that works.

2018-08-30: e1 - multicomp6809 - testing another SD card image (using the serial-only configuration)

[tingo@kg-elitebook multicomp6809]$ pwd
/home/tingo/personal/projects/fpga/Altera/c3/multicomp/multicomp6809
[tingo@kg-elitebook multicomp6809]$ sudo dd if=./multicomp09_sd_2016-01-09.img of=/dev/sdc
179008+0 records in
179008+0 records out
91652096 bytes (92 MB, 87 MiB) copied, 20.3065 s, 4.5 MB/s

and test it. According to the forum, CamelForth, CUBIX, Buggy and Flex should work NITROS Level II might not work level I should work. BASIC from SD card does not work. Testing

OK BUGGY  -- hangs
OK CUBIX -- hangs
OK FLEX -- hangs
OK SDFORTH -- hangs
OK NITROS9 -- hangs

try SDboot (not sure what it does)

OK SDBOOT -- hangs (the driveLED is on for a longer time than the others)
OK BASIC -- hangs

test the April 2017 image again

[tingo@kg-elitebook multicomp6809]$ sudo dd if=./multicomp09_sd_2017-04-22.img of=/dev/sdc
266239+0 records in
266239+0 records out
136314368 bytes (136 MB, 130 MiB) copied, 29.64 s, 4.6 MB/s

testing, nope the programs just hangs like before.

2018-08-29: multicomp - VGA adapter

pins        signal
6, 7, 8, 10 GND
13          hSync
14          vSync
1, 2, 3     R, G, B - 2 bits
b0 - 680R in series
b1 - 470R in series

maximum level on the analog (R, G, B) signals should be 0.7V. the resistance in the VGA monitor is 75 ohms.

b1 b0 resistance voltage out (mV, on VGA pin)
 0  0 infinite     0
 0  1 680R       327.81
 1  0 470R       454.13
 1  1 277R91     701.31

a three bit DAC would use

b2 - 2k
b1 - 1k
b0 - 510R

a four bit DAC would use

b3 - 3k9
b2 - 2k
b1 - 1k
b0 - 510R

or?

2018-08-24: e1 - multicomp z80 - CP/M, test it ROM changed from

rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC

to

rom1 : entity work.Z80_CPM_BASIC_ROM -- 8KB BASIC and CP/M boot

in architecture add

    --CPM
   signal n_RomActive : std_logic := '0';

after 'begin' add

--CPM
-- Disable ROM if out 38. Re-enable when (asynchronous) reset pressed
process (n_ioWR, n_reset) begin
if (n_reset = '0') then
n_RomActive <= '0';
elsif (rising_edge(n_ioWR)) then
if cpuAddress(7 downto 0) = "00111000" then -- $38
n_RomActive <= '1';
end if;
end if;
end process;

chip select, change from

n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" else '1'; --8K at bottom of memory

to

n_basRomCS <= '0' when cpuAddress(15 downto 13) = "000" and n_RomActive = '0' else '1'; --8K at bottom of memory

compile, test,

Press [SPACE] to activate console

CP/M Boot ROM 2.0 by G. Searle

BC or BW - ROM BASIC Cold/Warm
X        - Boot CP/M (load $D000-$FFFF)
:nnnn... - Load Intel-Hex file record
Gnnnn    - Run loc nnnn

>

looks good so far. BC also works

>b
Cold or warm?

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
52755 Bytes free
Ok

good. X works too,

>x
Boot CP/M?
Loading CP/M...

but I need to set up CP/M first. I loaded the formatter as a HEX file first, and started it:

>g5000
CP/M Formatter 2.0 by G. Searle 2013
ABCDEFGHIJKLMNOP
Formatting complete

>

next is putsys. Load in sequence: cpm22.hex, cbios128.hex, putsys.hex. Then start putsys

>g5000
CP/M System Transfer by G. Searle 2012-13

System transfer complete

>

ok, try to boot CP/M

>x
Boot CP/M?
Loading CP/M...
CP/M BIOS 2.0 by G. Searle 2013

CP/M 2.2 (c) 1979 by Digital Research

A>

cool. Next up is download2.hex. Reset button, then upload the hex file, then

>GFFE8
CP/M BIOS 2.0 by G. Searle 2013

CP/M 2.2 (c) 1979 by Digital Research

A>save 2 download.com
A>

(this took a while). Check that it is on disk

A>dir
A: DOWNLOAD COM

yes.

2018-08-24: e1 - multicomp z80 - test with external RAM already set up, run the test

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
57011 Bytes free
Ok

looks good, test programs - run ok.

2018-08-24: e1 - multicomp 6809 - test with external RAM it is already configured for external SRAM, so compile and test

6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK
PRINT MEM
-8944
OK

hmm it is not supposed to print a negative number? Well, the test programs run, so maybe it just does that.

2018-08-24: e1 - multicomp 6502 - test with external RAM RAM changed to

sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
sramData <= cpuDataOut when n_WR='0' else (others => 'Z');
n_sRamWE <= n_memWR;
n_sRamOE <= n_memRD;
n_sRamCS <= n_externalRamCS;

and chip select line changed from

n_internalRam1CS <= '0' when cpuAddress(15) = '0' else '1';

to

n_externalRamCS<= not n_basRomCS;

compile, test not working to well, check pin assignments - pin assignments are correct. check VHDL code - looks ok. Still , the output is

Cold [C] or warm [W] start?

$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$?
$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$?

and then it hangs.

2018-08-24: e1 - multicomp6809 - testing with the newly built RAM adapter

OK HEX
OK 1000 1080 STUP 1000 20 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
OK 1000 108F STUP 1000 20 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................

looks good. Full tests

OK 1000 1FFF PASS
OK 1000 1FFF 10 PASSES ................
OK 0800 CFFF 10 PASSES ................

good, good. Check the SD card (the driveLED lights up briefly when I execute the SDRD word)

OK 200 80 DUMP
0200  FF FF FE B3 7F 7F FD F7  FB FF FF FF FF FF FF FF  ................
0210  03 4A 00 30 A3 31 01 E9  F1 AC FA 0D E8 94 28 03  .J.0.1........(.
0220  FF EF F5 EF FF DF FB FB  FF FF FF FF FF FE FF FF  ................
0230  14 A4 98 23 47 4A AB 6B  55 5F DE E4 8D 29 AA 43  ...#GJ.kU_...).C
0240  FB D3 F7 FE FF B7 9B FB  FC BF FD FF FF FF EF BF  ................
0250  81 21 4F CA 1A B8 2E 8C  D7 13 63 F3 D4 00 5C 4A  .!O.......c...\J
0260  F5 FF FF BD 7E FF FF FE  FF FF FF FF FF FF FF FF  ....~...........
0270  08 09 0A B0 32 A8 A5 5C  25 FE BB 12 73 A0 21 46  ....2..\%...s.!F
OK 0 200 SDRD
OK 200 80 DUMP
0200  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0210  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0220  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0230  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0240  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0250  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0260  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
0270  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................

yes, that appears to have worked.

2018-08-24: e1 - multicomp6809 - testing commences. High order address lines to be grounded (GND) one by one and the see if something changes in my dump lines are

177 sramAddress[15]
189 sramAddress[14]
184 sramAddress[13]
195 sramAddress[12]
183 sramAddress[11]
188 sramAddress[10]
176 sramAddress[9]
187 sramAddress[8]

grounded A15, A14, A13, interesting - as soon as I ground A13, I get no output at all on the console. When I put it back the console starts working again. Put it back for now. (A15 and A14 is still grounded) grounded A12, my breadboard contraption was unstable, and the jumper wires didn't fit very well to the pins on the FPGA board. It got increasingly frustrating to work with it. So I built another RAM adapter, this time with pins on the breadboard, so I could use uncut dupont wires.

2018-08-23: e1 - multicomp6809 - based on advice in the forum thread, it looks like I have trouble with d[7]: "problems with d[7] being corrupted from 0 to 1 on odd locations but only in groups of 8 and only in some circumstances (the fill to 108F but not the fill to 1080)". First I checked for shorts on the breadboard, but found none. Next, try changing pin assignment for sramData[7] from

196 sramData[7]

to

235 sramData[7]

(175 can't be used, it is GND). Compile and test.

OK HEX
OK 1000 1080 STUP 1000 20 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
OK 1000 108F STUP 1000 20 DUMP
1000  10 80 10 82 10 84 10 86  10 88 10 8A 10 8C 10 8E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................

the corruption is still there. If I disconnect sramData[7] and test, the machine hangs put

196 sramData[7] back again.

Decoupling capacitor - I soldered a .01 mikroF (104) ceramic capacitor between VCC and VSS on the breadboard.

OK HEX
OK 1000 1080 STUP 1000 20 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
OK 1000 108F STUP 1000 20 DUMP
1000  10 80 10 82 10 84 10 86  10 88 10 8A 10 8C 10 8E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................

test failed.

2018-08-22: e1 - multicomp6809 - I changed to another RAM chip. Testing again

OK HEX
OK 1000 1080 0 FILL 1000 80 DUMP
1000  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1010  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1020  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1030  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1040  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1050  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1060  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
1070  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  ................
OK 1000 1080 FF FILL 1000 80 DUMP
1000  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1010  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1020  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1030  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1040  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1050  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1060  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................
1070  FF FF FF FF FF FF FF FF  FF FF FF FF FF FF FF FF  ................

simple stuff works.

OK 1000 1080 STUP TSTUP
OK 1000 1080 STUPI TSTUPI
OK ABORT 

simple addressing also seems to work. With dump

OK 1000 1080 STUP 1000 80 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
1020  10 20 10 22 10 24 10 26  10 28 10 2A 10 2C 10 2E  . .".$.&.(.*.,..
1030  10 30 10 32 10 34 10 36  10 38 10 3A 10 3C 10 3E  .0.2.4.6.8.:.<.>
1040  10 40 10 42 10 44 10 46  10 48 10 4A 10 4C 10 4E  .@.B.D.F.H.J.L.N
1050  10 50 10 52 10 54 10 56  10 58 10 5A 10 5C 10 5E  .P.R.T.V.X.Z.\.^
1060  10 60 10 62 10 64 10 66  10 68 10 6A 10 6C 10 6E  .`.b.d.f.h.j.l.n
1070  10 70 10 72 10 74 10 76  10 78 10 7A 10 7C 10 7E  .p.r.t.v.x.z.|.~
OK 1000 1080 STUPI 1000 80 DUMP
1000  F0 00 EF FE EF FC EF FA  EF F8 EF F6 EF F4 EF F2  ................
1010  EF F0 EF EE EF EC EF EA  EF E8 EF E6 EF E4 EF E2  ................
1020  EF E0 EF DE EF DC EF DA  EF D8 EF D6 EF D4 EF D2  ................
1030  EF D0 EF CE EF CC EF CA  EF C8 EF C6 EF C4 EF C2  ................
1040  EF C0 EF BE EF BC EF BA  EF B8 EF B6 EF B4 EF B2  ................
1050  EF B0 EF AE EF AC EF AA  EF A8 EF A6 EF A4 EF A2  ................
1060  EF A0 EF 9E EF 9C EF 9A  EF 98 EF 96 EF 94 EF 92  ................
1070  EF 90 EF 8E EF 8C EF 8A  EF 88 EF 86 EF 84 EF 82  ................

good. More tests

OK ABORT 
OK HEX
OK 1000 108F PASS  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E

hmm,

OK 1000 1080 PASS
OK 1000 1082 PASS  Error@1000  Error@1000
OK 1000 1084 PASS  Error@1000  Error@1002  Error@1000  Error@1002
OK 1000 1086 PASS  Error@1000  Error@1002  Error@1004  Error@1000  Error@1002  Error@1004
OK 1000 1088 PASS  Error@1000  Error@1002  Error@1004  Error@1006  Error@1000  Error@1002  Error@1004  Error@1006

so, that's a clue. More tests suggested in the forum thread:

OK 1000 1080 STUP 1000 20 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
OK 1000 108F STUP 1000 20 DUMP
1000  10 80 10 82 10 84 10 86  10 88 10 8A 10 8C 10 8E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................

and

OK ABORT 
OK HEX
OK 1000 1080 STUP 1000 20 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
OK 1000 108F STUP 1000 20 DUMP
1000  10 80 10 82 10 84 10 86  10 88 10 8A 10 8C 10 8E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................

corruption. An address line stuck?

2018-08-22: e1 - multicomp6809 - testing without internal RAM.

OK HEX
OK 1000 1080 0 FILL --DICT/SPARE--->0--?

OK 1000 80 DUMP T��E
                   �� --DICT/SPARE--->L--<--- UNUSE?

OK

looks like my prevoius test (with internal RAM) was flawed. This is bad. Maybe the RAM chip is bad / not working?

2018-08-20: e1 - multicomp6809 - more testing with Forth

OK 1000 1001 PASS
OK 1000 1002 PASS
OK 1000 1004 PASS
OK 1000 1008 PASS
OK 1000 100F PASS
OK 1000 1010 PASS
OK 1000 1012 PASS
OK 1000 1014 PASS
OK 1000 1018 PASS
OK 1000 101A PASS
OK 1000 101C PASS
OK 1000 101B PASS
OK 1000 101E PASS
OK 1000 101F PASS
OK 1000 1020 PASS
OK 1000 1040 PASS
OK 1000 1080 PASS
OK 1000 10A0 PASS  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1010  Error@1012  Error@1014  Error@1016  Error@1018  Error@101A  Error@101C  Error@101E  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1010  Error@1012  Error@1014  Error@1016  Error@1018  Error@101A  Error@101C  Error@101E
OK 1000 10C0 PASS  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1010  Error@1012  Error@1014  Error@1016  Error@1018  Error@101A  Error@101C  Error@101E  Error@1020  Error@1022  Error@1024  Error@1026  Error@1028  Error@102A  Error@102C  Error@102E  Error@1030  Error@1032  Error@1034  Error@1036  Error@1038  Error@103A  Error@103C  Error@103E  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1010  Error@1012  Error@1014  Error@1016  Error@1018  Error@101A  Error@101C  Error@101E  Error@1020  Error@1022  Error@1024  Error@1026  Error@1028  Error@102A  Error@102C  Error@102E  Error@1030  Error@1032  Error@1034  Error@1036  Error@1038  Error@103A  Error@103C  Error@103E
OK 1000 10E0 PASS  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1010  Error@1012  Error@1014  Error@1016  Error@1018  Error@101A  Error@101C  Error@101E  Error@1020  Error@1022  Error@1024  Error@1026  Error@1028  Error@102A  Error@102C  Error@102E  Error@1030  Error@1032  Error@1034  Error@1036  Error@1038  Error@103A  Error@103C  Error@103E  Error@1040  Error@1042  Error@1044  Error@1046  Error@1048  Error@104A  Error@104C  Error@104E  Error@1050  Error@1052  Error@1054  Error@1056  Error@1058  Error@105A  Error@105C  Error@105E  Error@1000  Error@1002  Error@1004  Error@1006  Error@1008  Error@100A  Error@100C  Error@100E  Error@1010  Error@1012  Error@1014  Error@1016  Error@1018  Error@101A  Error@101C  Error@101E  Error@1020  Error@1022  Error@1024  Error@1026  Error@1028  Error@102A  Error@102C  Error@102E  Error@1030  Error@1032  Error@1034  Error@1036  Error@1038  Error@103A  Error@103C  Error@103E  Error@1040  Error@1042  Error@1044  Error@1046  Error@1048  Error@104A  Error@104C  Error@104E  Error@1050  Error@1052  Error@1054  Error@1056  Error@1058  Error@105A  Error@105C  Error@105E

interesting.

OK 1000 1080 STUP
OK 1000 30 DUMP
1000  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1010  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
1020  10 20 10 22 10 24 10 26  10 28 10 2A 10 2C 10 2E  . .".$.&.(.*.,..
OK 1030 30 DUMP
1030  10 30 10 32 10 34 10 36  10 38 10 3A 10 3C 10 3E  .0.2.4.6.8.:.<.>
1040  10 40 10 42 10 44 10 46  10 48 10 4A 10 4C 10 4E  .@.B.D.F.H.J.L.N
1050  10 50 10 52 10 54 10 56  10 58 10 5A 10 5C 10 5E  .P.R.T.V.X.Z.\.^
OK 1060 30 DUMP
1060  10 60 10 62 10 64 10 66  10 68 10 6A 10 6C 10 6E  .`.b.d.f.h.j.l.n
1070  10 70 10 72 10 74 10 76  10 78 10 7A 10 7C 10 7E  .p.r.t.v.x.z.|.~
1080  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
OK 1080 30 DUMP
1080  10 00 10 02 10 04 10 06  10 08 10 0A 10 0C 10 0E  ................
1090  10 10 10 12 10 14 10 16  10 18 10 1A 10 1C 10 1E  ................
10A0  10 20 10 22 10 24 10 26  10 28 10 2A 10 2C 10 2E  . .".$.&.(.*.,..

not sure what this is.

OK 1000 1080 STUPI
OK 1000 30 DUMP
1000  F0 00 EF FE EF FC EF FA  EF F8 EF F6 EF F4 EF F2  ................
1010  EF F0 EF EE EF EC EF EA  EF E8 EF E6 EF E4 EF E2  ................
1020  EF E0 EF DE EF DC EF DA  EF D8 EF D6 EF D4 EF D2  ................
OK 1030 30 DUMP
1030  EF D0 EF CE EF CC EF CA  EF C8 EF C6 EF C4 EF C2  ................
1040  EF C0 EF BE EF BC EF BA  EF B8 EF B6 EF B4 EF B2  ................
1050  EF B0 EF AE EF AC EF AA  EF A8 EF A6 EF A4 EF A2  ................
OK 1060 30 DUMP
1060  EF A0 EF 9E EF 9C EF 9A  EF 98 EF 96 EF 94 EF 92  ................
1070  EF 90 EF 8E EF 8C EF 8A  EF 88 EF 86 EF 84 EF 82  ................
1080  F0 00 EF FE EF FC EF FA  EF F8 EF F6 EF F4 EF F2  ................
OK 1080 30 DUMP
1080  F0 00 EF FE EF FC EF FA  EF F8 EF F6 EF F4 EF F2  ................
1090  EF F0 EF EE EF EC EF EA  EF E8 EF E6 EF E4 EF E2  ................
10A0  EF E0 EF DE EF DC EF DA  EF D8 EF D6 EF D4 EF D2  ................

I wish I knew what I was looking for.

2018-08-18: c1 - multicomp z80 - test a 32K internal RAM module RAM changed to

ram1: entity work.InternalRam32K

and

address => cpuAddress(14 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "001" or cpuAddress(15 downto 13) = "010" or cpuAddress(15 downto 13) = "011" 
or cpuAddress(15 downto 13) = "100" else '1';

compile, test

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
32435 Bytes free
Ok

test programs run ok.

2018-08-18: c1 - multicomp 6809 - test a 32K internal RAM module RAM changed to

ram1: entity work.InternalRam32K

and

address => cpuAddress(14 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15) = '0' else '1';

compile, test,

6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK
PRINT MEM
 32016
OK

looks ok.

2018-08-17: VHDL - UVVM could be useful for testing / verification.

2018-08-17: external SRAM - measured all connections with an ohmmeter - they are ok.

2018-08-16: e1 - multicomp6089 - trying the MicrocomputerPCB project, with full external SRAM now.

6809 CamelForth v1.1  20 Mar 16

OK HEX
OK 1000 1FFF PASS !000?

OK HEX
OK 1000 1FFF 10 PASSES !000?

OK HEX
OK 0800 CFFF 10 PASSES --DICT/SPARE---> --�?

OK HEX
OK 1000 20 AB FILL !000?
1000 30 DUMP !000?

so something is wrong with the (external) RAM. Look for addressing trouble

OK 1000 2000 STUP
OK 1000 30 DUMP
1000  10 80 10 82 10 84 10 86  10 88 10 8A 10 8C 10 8E  ................
1010  10 90 10 96 10 94 10 96  10 98 10 9A 10 9C 10 9E  ................
1020  10 A0 10 A2 10 A4 10 A6  10 A8 10 AA 10 AC 10 AE  ................
OK

hmm, not sure.

2018-08-16: e1 - multicomp6089 - full external SRAM (64K) - RAM changed to

sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
sramData <= cpuDataOut when n_WR='0' else (others => 'Z');
n_sRamWE <= n_memWR;
n_sRamOE <= n_memRD;
n_sRamCS <= n_externalRamCS;

chip select changed to

n_externalRamCS<= not n_basRomCS;

compile, test BASIC shows up

6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK

but does not behave properly

10 FOR
 A=0 TO 6.2 STEP 0.2

(and hangs here)

2018-08-16: e1 - multicomp z80 - try with external SRAM (64K) - wiring at C3 board page, compile, test

>b
Cold or warm?

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
52808 Bytes free
Ok

BASIC works, how about the rest? load formatter

>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>..................
>Complete

try it

>g5000

>

doesn't work

2018-08-16: e1 - multicomp z80 - try with the original SD controller: SD

sd1 : entity work.sd_controller
port map(
sdCS => sdCS,
sdMOSI => sdMOSI,
sdMISO => sdMISO,
sdSCLK => sdSCLK,
n_wr => n_sdCardCS or n_ioWR,
n_rd => n_sdCardCS or n_ioRD,
n_reset => n_reset,
dataIn => cpuDataOut,
dataOut => sdCardDataOut,
regAddr => cpuAddress(2 downto 0),
driveLED => driveLED,
clk => sdClock -- twice the spi clk
);

compile, test - ROM works, but the formatter still hangs

>g5000
CP/M Formatter 2.0 by G. Searle 2013
A

well, I have tested it at least.

2018-08-16: e1 - multicomp z80 - try out the CP/M ROM ROM changed from

rom1 : entity work.Z80_BASIC_ROM -- 8KB BASIC

to

rom1 : entity work.Z80_CPM_BASIC_ROM -- 8KB BASIC and CP/M boot

compile, test,

Press [SPACE] to activate console

CP/M Boot ROM 2.0 by G. Searle

BC or BW - ROM BASIC Cold/Warm
X        - Boot CP/M (load $D000-$FFFF)
:nnnn... - Load Intel-Hex file record
Gnnnn    - Run loc nnnn

>

loading BASIC works

>b
Cold or warm?

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
28179 Bytes free
Ok

(the reset button works) but loading CP/M fails

>x
Boot CP/M?
Loading CP/M...

which is expected at this stage. I can load the formatter

>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>........................
>..................
>Complete

and it starts

>g5000
CP/M Formatter 2.0 by G. Searle 2013
A

but hangs. Perhaps I really need that external RAM.

2018-08-16: e1 - multicomp z80 - create an internal RAM 64K module and test it. RAM changed to

ram1: entity work.InternalRam64K

and

address => cpuAddress(15 downto 0),

chip select changed to

n_internalRam1CS <= '0' not n_basRomCS;

correction, it should be

n_internalRam1CS <= not n_basRomCS;

compile - got an error, device too small

Error (170040): Can't place all RAM cells in design
    Info (170034): Selected device has 66 memory locations of type M9K. The current design requires 72 memory locations of type M9K to successfully fit.
    Info (170033): Memory usage required for the design in the current device: 109% M9K memory block locations required

ok, so that won't work. Change back to 32K internal RAM.

2018-08-16: e1 - multicomp z80 - add SD card support. First I copied sd_controller.vhd from multicomp6809, to get SD and SDHC card support. Grant's original SD card code for the z80 is

sd1 : entity work.sd_controller
port map(
sdCS => sdCS,
sdMOSI => sdMOSI,
sdMISO => sdMISO,
sdSCLK => sdSCLK,
n_wr => n_sdCardCS or n_ioWR,
n_rd => n_sdCardCS or n_ioRD,
n_reset => n_reset,
dataIn => cpuDataOut,
dataOut => sdCardDataOut,
regAddr => cpuAddress(2 downto 0),
driveLED => driveLED,
clk => sdClock -- twice the spi clk
);

and from multicomp6089 it is

sd1 : entity work.sd_controller
generic map(
  CLKEDGE_DIVIDER => 25      -- clk=50MHz / 25 gives edges at 2MHz and therefore
                             -- an sdSCLK of 1MHz.
) port map(
      sdCS => sdCS,
      sdMOSI => sdMOSI,
      sdMISO => sdMISO,
      sdSCLK => sdSCLK,
      n_wr => n_WR_sd,
      n_rd => n_RD_sd,
      n_reset => n_reset,
      dataIn => cpuDataOut,
      dataOut => sdCardDataOut,
      regAddr => cpuAddress(2 downto 0),
      driveLED => driveLED,
      clk => clk
);

a merged version is

sd1 : entity work.sd_controller
generic map(
  CLKEDGE_DIVIDER => 25      -- clk=50MHz / 25 gives edges at 2MHz and therefore
                             -- an sdSCLK of 1MHz.
) port map(
      sdCS => sdCS,
      sdMOSI => sdMOSI,
      sdMISO => sdMISO,
      sdSCLK => sdSCLK,
      n_wr => n_sdCardCS or n_ioWR,
      n_rd => n_sdCardCS or n_ioRD,
      n_reset => n_reset,
      dataIn => cpuDataOut,
      dataOut => sdCardDataOut,
      regAddr => cpuAddress(2 downto 0),
      driveLED => driveLED,
      clk => clk
);

let me try that.Compiles ok, add pin definitions

pin signal
 45 sdSCLK
 49 sdCS
 51 sdMOSI
 57 sdMISO (WEAK_PULL_UP_RESISTOR ON)
233 driveLED

compile - ok. Test - BASIC still boots. Can't really test the SD card from it.

2018-08-15: e1 - multicomp6809 - I downloaded a SD card image from RetroBrewComputers wiki: Multicomp Cyclone-II C (under Downloads)

[tingo@kg-elitebook neal_crook]$ pwd
/home/tingo/personal/projects/fpga/Altera/c3/multicomp/neal_crook
[tingo@kg-elitebook neal_crook]$ ll *zip
-rw-rw-r--. 1 tingo tingo 19257665 Aug 15 18:14 multicomp09_sd_apr2017.zip
[tingo@kg-elitebook neal_crook]$ unzip -l multicomp09_sd_apr2017.zip
Archive:  multicomp09_sd_apr2017.zip
  Length      Date    Time    Name
---------  ---------- -----   ----
136314368  04-22-2017 21:46   multicomp09_sd.img
---------                     -------
136314368                     1 file

and wrote that to a microSD card.

[tingo@kg-elitebook neal_crook]$ sudo dd if=./multicomp09_sd.img of=/dev/sdc
266239+0 records in
266239+0 records out
136314368 bytes (136 MB, 130 MiB) copied, 35.1581 s, 3.9 MB/s

Now, test it. Unfortunately, the machine hangs on SD card access, suggesting that something is not working.

2018-08-15: e1 - multicomp6809 - pin assignments for microSD card interface

pin signal
45 sdSCLK
49 sdCS
51 sdMOSI
57 sdMISO (WEAK_PULL_UP_RESISTOR ON)
plus GND and 3V3

(note: pin 53 is VCCint, so it is not usable) set pin 233 as driveLED.

2018-08-15: e1 - let me try out Neal Crook's multicomp6809. Get the source

[tingo@kg-elitebook neal_crook]$ pwd
/home/tingo/personal/projects/fpga/Altera/c3/multicomp/neal_crook
[tingo@kg-elitebook neal_crook]$ git clone https://github.com/nealcrook/multicomp6809.git
Cloning into 'multicomp6809'...
remote: Counting objects: 1283, done.
remote: Compressing objects: 100% (41/41), done.
remote: Total 1283 (delta 28), reused 51 (delta 16), pack-reused 1219
Receiving objects: 100% (1283/1283), 10.09 MiB | 1.25 MiB/s, done.
Resolving deltas: 100% (775/775), done.

then copy the relevant files to a new location

[tingo@kg-elitebook multicomp]$ pwd
/home/tingo/personal/projects/fpga/Altera/c3/multicomp/multicomp6809/multicomp

and in Quartus II, create

2018-08-15: e1 - multicomp 6809 - test out 32K internal RAM module RAM changed to

ram1: entity work.InternalRam32K

and

address => cpuAddress(14 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15) = '0' else '1';

compile, test

6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK
PRINT MEM
 32016
OK

test programs -

2018-08-15: e1 - multicomp 6502 - test out 32K internal RAM module RAM changed to

ram1: entity work.InternalRam32K

and

address => cpuAddress(14 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15) = "0" else '1';

compile, get an error, changed chip select line to

n_internalRam1CS <= '0' when cpuAddress(15) = '0' else '1';

perhaps double quotes are just for strings. Yes, that was it Compile, test. The first time I uploaded the file I got this:

jtag> svf ./6502/Microcomputer/output_files/Microcomputer.svf
warning: unimplemented mode 'ABSENT' for TRST
Error svf: mismatch at position 445 for TDO
 in input file between line 5697 col 1 and line 5699 col 70

re-try

jtag> svf ./6502/Microcomputer/output_files/Microcomputer.svf
warning: unimplemented mode 'ABSENT' for TRST
jtag>

and console output

Cold [C] or warm [W] start?

MEMORY SIZE?
TERMINAL WIDTH?

 32255 BYTES FREE

OSI 6502 BASIC VERSION 1.0 REV 3.2
COPYRIGHT 1977 BY MICROSOFT CO.

OK

test programs - they run ok.

2018-08-13: e1 - multicomp z80 - create and test out a 32K internal RAM module RAM changed to

ram1: entity work.InternalRam32K

and

address => cpuAddress(14 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "001" or cpuAddress(15 downto 13) = "010" 
or cpuAddress(15 downto 13) = "011" or cpuAddress(15 downto 13) = "100" else '1';

compile, Quartus II reports

Total memory bits : 327,680 / 608,256 ( 54 % )

test

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
32435 Bytes free
Ok

run test programs - works ok.

2018-08-13: e1 - multicomp z80 - test out the 16K internal RAM module RAM changed to

ram1: entity work.InternalRam16K

and

address => cpuAddress(13 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "001" or cpuAddress(15 downto 13) = "010" else '1';

compile, test

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
16051 Bytes free
Ok

hmm, more than 16K? Anyway, it runs test programs just fine.

2018-08-13: e1 - multicomp 6809 - test out the 8K and 16K internal RAM module 8K module first. RAM changed to

ram1: entity work.InternalRam8K

and

address => cpuAddress(12 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "000" else '1';

compile, test, run test programs - it works. 16K module. RAM changed to

ram1: entity work.InternalRam16K

and

address => cpuAddress(13 downto 0),

chip select changed to

n_internalRam1CS <= '0' when cpuAddress(15 downto 14) = "00" else '1';

compile, test, run test programs - it works. ok.

2018-08-12: a test program from RetroBrew Computers Forum.

1 REM asciiart.bas benchmark for Rienk's sbc-2g-512 7.3728Mhz Z80 board running NASCOM ROM BASIC Ver 4.7
2 REM https://www.retrobrewcomputers.org/forum/index.php?t=msg&th=201&goto=4704&#msg_4704
3 REM 2m43s
4 REM
10 FOR Y=-12 TO 12
20 FOR X=-39 TO 39
30 CA=X*0.0458
40 CB= Y*0.08333
50 A=CA
60 B=CB
70 FOR I=0 TO 15
80 T=A*A-B*B+CA
90 B=2*A*B+CB
100 A=T
110 IF (A*A+B*B)>4 THEN GOTO 200
120 NEXT I
130 PRINT " ";
140 GOTO 210
200 IF I>9 THEN I=I+7
205 PRINT CHR$(48+I);
210 NEXT X
220 PRINT
230 NEXT Y

might be useful.

2018-08-10: e1 - multicomp z80 - change to 32K SRAM. chip select changed from

n_externalRamCS<= not n_basRomCS;

to

n_externalRamCS <= '0' when cpuAddress(15 downto 13) = "001" 
or cpuAddress(15 downto 13) = "010" or cpuAddress(15 downto 13) = "011" 
or cpuAddress(15 downto 13) = "100" else '1';

compile and test. Getting garble on my console. Perhaps I made a wrong pin assignment?

2018-08-10: e1 - multicomp z80 - changes to support SRAM RAM changed from

ram1: entity work.InternalRam8K
port map
(
address => cpuAddress(12 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);

to

sramAddress(15 downto 0) <= cpuAddress(15 downto 0);
sramData <= cpuDataOut when n_memWR='0' else (others => 'Z');
n_sRamWE <= n_memWR or n_externalRamCS;
n_sRamOE <= n_memRD or n_externalRamCS;
n_sRamCS <= n_externalRamCS;

chip select, the line

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "001" else '1';

to

n_externalRamCS<= not n_basRomCS;

compile and test

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
57011 Bytes free
Ok

good. A test program

list

10 FOR A=0 TO 6.2 STEP 0.2
20 PRINT TAB(40+SIN(A)*20);"*"
30 NEXT A
Ok
RUN
?SN Error
Ok

something is wrong. The SRAM is 55 ns access time, I should be able to do 20 MHz with it. Change to 5 MHz - nope, the problem is still there. Change to 1 MHz - no joy, still the same problem.

2018-08-10: e1 - multicomp z80 - add external SRAM. Pin assignments

pin signal
202 n_sRamCS
182 n_sRamOE
183 n_sRamWE
176 sramAddress[15]
189 sramAddress[14]
185 sramAddress[13]
195 sramAddress[12]
196 sramAddress[11]
200 sramAddress[10]
194 sramAddress[9]
188 sramAddress[8]
197 sramAddress[7]
177 sramAddress[6]
201 sramAddress[5]
203 sramAddress[4]
214 sramAddress[3]
217 sramAddress[2]
219 sramAddress[1]
221 sramAddress[0]
207 sramData[7]
216 sramData[6]
218 sramData[5]
184 sramData[4]
187 sramData[3]
231 sramData[2]
226 sramData[1]
223 sramData[0]

updated pins after finding that some of my candidates are GND or VCCINT, see the C3 board page.

2018-08-08: c1 - multicomp 6809 - start over, set up the project from scratch. 4K internal RAM, serial port. directory (I renamed the old one)

tingo@kg-core1$ pwd
/home/tingo/personal/projects/fpga/altera/C3/multicomp/m6809

then I copied the files from grants_multicomp but I still get problems, and an warning message that the ROM initialization file is read in word format (too wide) not good. In the end, I nuked the files in m6809/ROMS/6809/ and copied them from the multicomp 6502 directory. Now I don't get the warning message about the ROM initialization file anymore. Interesting. Test - nope, I still don't get anything on the serial console.

2018-08-08: c1 - multicomp 6809 - re-check that project also. I can't see any problems in the VHDL code. Pin assignments look ok too. Tried fixing up files in the project and other settings - no go.

2018-08-08: c1 - multicomp 6502 - re-checked the code. Sure enough, I made the same mistake there: chip select, the last line is

n_internalRam1CS <= '0' when cpuAddress(15 downto 12) = "0010" else '1';

instead of

n_internalRam1CS <= '0' when cpuAddress(15 downto 12) = "0000" else '1';

which is correct for a 6502 or 6809 (the incorrect line is for a z80). Recompile and test.

Cold [C] or warm [W] start?

MEMORY SIZE?
TERMINAL WIDTH?

 3583 BYTES FREE

OSI 6502 BASIC VERSION 1.0 REV 3.2
COPYRIGHT 1977 BY MICROSOFT CO.

OK

yep, that was it.

2018-08-08: e1 - Multicomp 6502 - create an 8K (and 16K) Internal RAM, and try it out. First the 8K: RAM changed from

ram1: entity work.InternalRam4K

to

ram1: entity work.InternalRam8K

and

address => cpuAddress(11 downto 0),

to

address => cpuAddress(12 downto 0),

chip select from

n_internalRam1CS <= '0' when cpuAddress(15 downto 12) = "0000" else '1';

to

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "000" else '1';

recompile and test.

Cold [C] or warm [W] start?

MEMORY SIZE?
TERMINAL WIDTH?

 7679 BYTES FREE

OSI 6502 BASIC VERSION 1.0 REV 3.2
COPYRIGHT 1977 BY MICROSOFT CO.

OK

it works. The 16K RAM is RAM

ram1: entity work.InternalRam16K
address => cpuAddress(13 downto 0),

chip select

n_internalRam1CS <= '0' when cpuAddress(15 downto 14) = "00" else '1';

compile and test

Cold [C] or warm [W] start?

MEMORY SIZE?
TERMINAL WIDTH?

 15871 BYTES FREE

OSI 6502 BASIC VERSION 1.0 REV 3.2
COPYRIGHT 1977 BY MICROSOFT CO.

OK

works too.

2018-08-08: e1 - Multicomp 6502 - I discovered an error in the chip select part ( I had configured it for 4K internal RAM), it has this line:

n_internalRam1CS <= '0' when cpuAddress(15 downto 12) = "0010" else '1';

which is correct for a Z80, but for a 6502 or 6809 it should be

n_internalRam1CS <= '0' when cpuAddress(15 downto 12) = "0000" else '1';

so change it, recompile and test.

Cold [C] or warm [W] start?

MEMORY SIZE?
TERMINAL WIDTH?

 3583 BYTES FREE

OSI 6502 BASIC VERSION 1.0 REV 3.2
COPYRIGHT 1977 BY MICROSOFT CO.

OK

yes, now it works. Again, this basic requires UPPER case

list

?SN ERROR
OK
Test program
LIST

 10 FOR A=0 TO 6.2 STEP 0.2
 20 PRINT TAB(40 + SIN(A)*20);"*"
 30 NEXT A
OK
run
RUN
                                        *
                                           *
                                               *
                                                   *
                                                      *
                                                        *
                                                          *
                                                           *
                                                           *
                                                           *
                                                          *
                                                        *
                                                     *
                                                  *
                                              *
                                          *
                                      *
                                  *
                               *
                           *
                        *
                      *
                    *
                    *
                    *
                    *
                      *
                        *
                           *
                              *
                                  *
                                      *

OK

good.

2018-08-08: e1 - Multicomp 6809 - I configure with 4K internal RAM, serial port and compile it. Compiles ok, now test:

6809 EXTENDED BASIC
(C) 1982 BY MICROSOFT

OK
it works. Test program
10 FOR A=0 TO 6.2 STEP 0.2
20 PRINT TAB(40 + SIN(A)*20);"*"
30 NEXT A
list
?SN ERROR
OK
LIST
10 FOR A=0 TO 6.2 STEP 0.2
20 PRINT TAB(40 + SIN(A)*20);"*"
30 NEXT A
OK

note: this basic needs UPPER case, apparently.

RUN
                                        *
                                           *
                                               *
                                                   *
                                                      *
                                                        *
                                                          *
                                                           *
                                                           *
                                                           *
                                                          *
                                                        *
                                                     *
                                                  *
                                              *
                                          *
                                      *
                                  *
                               *
                           *
                        *
                      *
                    *
                    *
                    *
                    *
                      *
                        *
                           *
                              *
                                  *
                                      *
OK

it runs.

2018-08-07: e1 - Multicomp 6502 - I configure with 4K internal RAM, serial port and compile. It compiles, but the resulting code only shows garbage on the serial console when loaded into the FPGA. Changing cpu clock to 1 MHz - no output on serial console. cpu clock at 2 MHz - garbage on serial console again.

2018-08-07: e1 - Multicomp z80 - I use the Megafunction wizard to create InternalRam8K(cmp,qip,vhd) which is 8K in size. Next change Micromputer.vhd to use that 8K RAM RAM from

ram1: entity work.InternalRam2K
port map
(
address => cpuAddress(10 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);

to

ram1: entity work.InternalRam8K
port map
(
address => cpuAddress(12 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);

chip select from

n_internalRam1CS <= '0' when cpuAddress(15 downto 11) = "00100" else '1';

to

n_internalRam1CS <= '0' when cpuAddress(15 downto 13) = "001" else '1';

recompile and test

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
7859 Bytes free
Ok

that's nice. Quartus II says

Total memory bits                  ; 131,072 / 608,256 ( 22 % )

about memory, which is cool.

2018-08-07: e1 - Multicomp z80 - let me change RAM from 4K to 2K, like so (in Microcomputer.vhd): from

ram1: entity work.InternalRam4K
port map
(
address => cpuAddress(11 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);

to

ram1: entity work.InternalRam2K
port map
(
address => cpuAddress(10 downto 0),
clock => clk,
data => cpuDataOut,
wren => not(n_memWR or n_internalRam1CS),
q => internalRam1DataOut
);

and chip select, the line

n_internalRam1CS <= '0' when cpuAddress(15 downto 12) = "0010" else '1';

to

n_internalRam1CS <= '0' when cpuAddress(15 downto 11) = "00100" else '1';

recompile and test:

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
1715 Bytes free
Ok

so it works.

2018-08-07: e1 - Quartus II - if you get messages like these:

Error (169187): Following feature(s) of I/O pin ~ALTERA_ASDO_DATA1~ has invalid setting(s) in the configuration scheme ACTIVE_SERIAL when the pin is placed at pin location 12
    Info (169189): I/O feature 'Weak Pull Up' has an invalid setting. The setting should be ON.
Error (169187): Following feature(s) of I/O pin ~ALTERA_FLASH_nCE_nCSO~ has invalid setting(s) in the configuration scheme ACTIVE_SERIAL when the pin is placed at pin location 14
    Info (169189): I/O feature 'Weak Pull Up' has an invalid setting. The setting should be ON.
Error (169187): Following feature(s) of I/O pin ~ALTERA_DCLK~ has invalid setting(s) in the configuration scheme ACTIVE_SERIAL when the pin is placed at pin location 23
    Info (169189): I/O feature 'Weak Pull Up' has an invalid setting. The setting should be ON.
Error (169187): Following feature(s) of I/O pin ~ALTERA_DATA0~ has invalid setting(s) in the configuration scheme ACTIVE_SERIAL when the pin is placed at pin location 24
    Info (169189): I/O feature 'Weak Pull Up' has an invalid setting. The setting should be ON.
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:01
Error (171000): Can't fit design in device

you should check the .qsf file (Microcomputer.qsf for this project) for this setting

set_global_assignment -name WEAK_PULL_UP_RESISTOR OFF

and comment it out, like this

# set_global_assignment -name WEAK_PULL_UP_RESISTOR OFF

good to know.

2018-08-07: c1 - multicomp 6809 - I set up a project for 6809 version directory

tingo@kg-core1$ pwd
/home/tingo/personal/projects/fpga/altera/C3/multicomp/m6809

compiles, but generates no output on serial console.

2018-08-07: c1 - multicomp 6502 - I set up a project for 6502 version directory

tingo@kg-core1$ pwd
/home/tingo/personal/projects/fpga/altera/C3/multicomp/m6502

it compiles ok, in Quartus II, but unfortunately it only generates garbage on serial when I test it.

2018-08-07: c1 - multicomp z80 - first test (under FreeBSD). I connected screen: screen /dev/ttyU1 115200 and this shows up:

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
3763 Bytes free
Ok

good. Try a small program

list

10 FOR A=0 TO 6.2 STEP 0.2
20 PRINT TAB(40 + SIN(A)*20);"*"
30 NEXT A
Ok

run it

run
                                        *
                                           *
                                               *
                                                   *
                                                      *
                                                        *
                                                          *
                                                           *
                                                           *
                                                           *
                                                          *
                                                        *
                                                     *
                                                  *
                                              *
                                          *
                                      *
                                  *
                               *
                           *
                        *
                      *
                    *
                    *
                    *
                    *
                      *
                        *
                           *
                              *
                                  *
                                      *
Ok

good, good.

2018-08-06: c1 - multicomp z80 - use Urjtag to program that file

jtag> cable FT2232 vid=0x0403 pid=0x6010
Connected to libftdi driver.
jtag> bsdl path /home/tingo/doc/Altera/docs/fpga/Cyclone_III/bsdl/
jtag> detect
IR length: 10
Chain length: 1
Device Id: 00000010000011110011000011011101 (0x00000000020F30DD)
  Filename:     /home/tingo/doc/Altera/docs/fpga/Cyclone_III/bsdl//EP3C25Q240.BSD
jtag> svf ./Microcomputer/output_files/Microcomputer.svf
Warning svf: unimplemented mode 'ABSENT' for TRST
jtag>

hmm, but it doesn't appear to work. Ah! Major user error - I forgot to complete the Microcomputer.vhd file! Fixed now (blush). Recompile in Quartus (I missed some files, added those to the project, and it compiles), then reprogam.

2018-08-06: c1 - multicomp z80 - Quartus II (64 bit). I repeated my test of Quartus II and my method to get a working project project directory

tingo@kg-core1$ pwd
/home/tingo/personal/projects/fpga/altera/C3/multicomp/z80

the method is - create correct directory structure for the project - use "New project wizard" in Quartus II to set up correct device (EP3C25Q240C8) and so on (remember to set up .svf file generation under Device, Device and Pin Options, Programming files) - use Assignment Editor to assign pins (and pull ups where required)

152 clk
181 n_reset (WEAK_PULL_UP_RESISTOR ON) (not used?)
224 rxd1 (WEAK_PULL_UP_RESISTOR ON)
230 rts1
232 txd1
  • compile and a .svf file is generated. Lots of warnings about "missing clocks".

2018-08-01: e1 - Multicomp, z80, testing the basic

RUN
Hello world!
Ok
LIST

10 PRINT "Hello world!"
20 END
Ok
cool. another example
list

10 FOR A=0 TO 6.2 STEP 0.2
20 PRINT TAB(40 + SIN(A)*20);"*"
30 NEXT A
Ok
run
                                        *
                                           *
                                               *
                                                   *
                                                      *
                                                        *
                                                          *
                                                           *
                                                           *
                                                           *
                                                          *
                                                        *
                                                     *
                                                  *
                                              *
                                          *
                                      *
                                  *
                               *
                           *
                        *
                      *
                    *
                    *
                    *
                    *
                      *
                        *
                           *
                              *
                                  *
                                      *
Ok

good.

2018-08-01: e1 - Multicomp, z80, second try. Specifics: serial connection only, 4K internal RAM, Z80 processor. project directory

[tingo@kg-elitebook Microcomputer]$ pwd
/home/tingo/personal/projects/fpga/Altera/c3/multicomp/z80_test/Microcomputer

pin assignments:

152 clk
181 n_reset (WEAK_PULL_UP_RESISTOR ON) (not used?)
224 rxd1 (WEAK_PULL_UP_RESISTOR ON)
230 rts1
232 txd1

in Quartus II, I create a new project (wizard) select the EP3C25Q240C8 device, and set up the correct directory. Then I copy all design files from the old directory (see below) and add them manually to Quartus II via "Project, Add/remove files in project". I use the Assignment Editor (Assignments, Assignment Editor) to set up pin assignments and "Weak Pull-up resistor on" for the pins that require it. Under Assignments, Device, Device and Pin Options, Programming files I check the box "Serial Vector Format (.svf)". Then I compile the project (Ctrl-L). For programming I use urjtag.

jtag> cable FT2232 vid=0x0403 pid=0x6010
Connected to libftdi driver.
jtag> bsdl path /home/tingo/doc/Altera/docs/fpga/Cyclone_III/bsdl/
jtag> detect
IR length: 10
Chain length: 1
Device Id: 00000010000011110011000011011101 (0x020F30DD)
  Filename:     /home/tingo/doc/Altera/docs/fpga/Cyclone_III/bsdl//EP3C25Q240.BSD
jtag> svf ./Microcomputer/output_files/Microcomputer.svf
warning: unimplemented mode 'ABSENT' for TRST
jtag>

After fixing various errors, (like wrong pin assignments, I switched pins for txd1 and rts1) I end up with something that works:

Z80 SBC By Grant Searle

Memory top?
Z80 BASIC Ver 4.7b
Copyright (C) 1978 by Microsoft
3763 Bytes free
Ok

Cool!

2018-08-01: e1 - trying out the Multicomp, z80, minimal example first. Specifics: serial connection only, 4K internal RAM, Z80 processor. project directory

[tingo@kg-elitebook z80]$ pwd
/home/tingo/personal/projects/fpga/Altera/c3/multicomp/z80

pins

152 clk
181 reset_n
233 LED

Quartus II, I select EP3C25Q240C8 as device, all pin assignments reset. After messing with this for many hours, and still getting errors from Quartus II, I tried a different angle

2018-07-31: Multicomp - pin assignments. From Micromputer.qsf, I get the following assignments for the original Multicomp serial ports

pin name
101 rxd1 (WEAK_PULL_UP_RESISTOR ON)
103 txd1
104 rts1

pin name
 99 rxd2 (WEAK_PULL_UP_RESISTOR ON)
100 txd2
 96 rts2

note: if using a 3.3V usb ttl adapter, use 2.7kohm resistors in series with rxd, txd and rts.

SD card

pin name
 92 sdMISO (WEAK_PULL_UP_RESISTOR ON)
 94 sdSCLK
 93 sdMOSI
 97 sdCS
   3 driveLED

composite video out

pin name
 75 video
 74 videoSync

note: 1 kohm in series with videoSync, 470 ohm in series with video

PS/2 keyboard in

pin name
 87 ps2Data
 86 ps2Clk

note: 10 kohm pullups on ps2Data, ps2Clk

VGA video out

pin name
 64 videoB0
 63 videoB1
 67 videoG0
 65 videoG1
 70 videoR0
 69 videoR1
 71 hSync
 72 vSync

note: 680 ohm in series with videoB0, videoG0, videoR0. 470 ohm in series with videoB1, videoG1, videoR1. Other ends of resistors tied together before connected to respective R, G, B on VGA connector.

external SRAM interface

pin name
  4 n_sRamWE
126 n_sRamCS
134 n_sRamOE
  8 sramAddress[15]
 30 sramAddress[14]
 24 sramAddress[13]
 28 sramAddress[12]
136 sramAddress[11]
132 sramAddress[10]
139 sramAddress[9]
142 sramAddress[8]
143 sramAddress[7]
141 sramAddress[6]
137 sramAddress[5]
135 sramAddress[4]
133 sramAddress[3]
129 sramAddress[2]
125 sramAddress[1]
121 sramAddress[0]
122 sramData[7]
120 sramData[6]
118 sramData[5]
114 sramData[4]
112 sramData[3]
113 sramData[2]
115 sramData[1]
119 sramData[0]

ok

2018-07-28: c1 - in Quartus II I changed device to EP3C25Q240C8 since that's what I have. The project is already configured:

cpu1 - z80
rom1 - Z80 BASIC ROM (8K)
ram1 - InternalRam4K
io1 - SBCTextDisplayRGB
- no SDcard
clocks - 10 MHz
serial baud rate 115200

so I just start a compilation. And it fails

+---------------------------------------------------------------------------------+
; Flow Summary                                                                    ;
+------------------------------------+--------------------------------------------+
; Flow Status                        ; Flow Failed - Sat Jul 28 00:54:31 2018     ;
; Quartus II 64-Bit Version          ; 13.1.4 Build 182 03/12/2014 SJ Web Edition ;
; Revision Name                      ; Microcomputer                              ;
; Top-level Entity Name              ; Microcomputer                              ;
; Family                             ; Cyclone III                                ;
; Device                             ; EP3C25Q240C8                               ;
; Timing Models                      ; Final                                      ;
; Total logic elements               ; 3,799 / 24,624 ( 15 % )                    ;
;     Total combinational functions  ; 3,502 / 24,624 ( 14 % )                    ;
;     Dedicated logic registers      ; 853 / 24,624 ( 3 % )                       ;
; Total registers                    ; 853                                        ;
; Total pins                         ; 31 / 149 ( 21 % )                          ;
; Total virtual pins                 ; 0                                          ;
; Total memory bits                  ; 139,264 / 608,256 ( 23 % )                 ;
; Embedded Multiplier 9-bit elements ; 0 / 132 ( 0 % )                            ;
; Total PLLs                         ; 1 / 4 ( 25 % )                             ;
+------------------------------------+--------------------------------------------+

because of (wrong?) pin assignment. On the bottom of Microcomputer.fit.rpt we have

Error (171016): Can't place node "SDRAM_nCS" -- illegal location assignment PIN_59 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 26
Error (171016): Can't place node "VGA_R[2]" -- illegal location assignment PIN_141 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 51
Error (171016): Can't place node "VGA_B[0]" -- illegal location assignment PIN_115 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 53
Error (171016): Can't place node "VGA_B[2]" -- illegal location assignment PIN_121 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 53
Error (171016): Can't place node "VGA_B[3]" -- illegal location assignment PIN_125 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 53
Error (171016): Can't place node "VGA_VS" -- illegal location assignment PIN_136 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 56
Error (171016): Can't place node "SPI_DO" -- illegal location assignment PIN_105 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 70
Error (171016): Can't place node "LED" -- illegal location assignment PIN_7 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 75
Error (171016): Can't place node "CLOCK_27[0]" -- illegal location assignment PIN_54 File: /zs/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp/multicomp/Microcomputer/Microcomputer.vhd Line: 25
Info (171121): Fitter preparation operations ending: elapsed time is 00:00:00
Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information.
Error (171000): Can't fit design in device
Error: Quartus II 64-Bit Fitter was unsuccessful. 10 errors, 3 warnings

ok.

2018-07-28: c1 - test wsoltys/multicomp - get the source

tingo@kg-core1$ pwd
/home/tingo/personal/projects/fpga/altera/C3/wsoltys_multicomp

get the source

tingo@kg-core1$ git clone https://github.com/wsoltys/multicomp.git
Cloning into 'multicomp'...
remote: Counting objects: 144, done.
remote: Compressing objects: 100% (65/65), done.
remote: Total 144 (delta 72), reused 144 (delta 72), pack-reused 0
Receiving objects: 100% (144/144), 276.11 KiB | 505.00 KiB/s, done.
Resolving deltas: 100% (72/72), done.

ok.

2018-07-28: I'm using my FreeBSD workstation (c1) for this test.

tingo@kg-core1$ uname -a
FreeBSD kg-core1.kg4.no 10.4-STABLE FreeBSD 10.4-STABLE #1 r329982: Sun Feb 25 20:35:06 CET 2018
     root@kg-core1.kg4.no:/usr/obj/usr/src/sys/GENERIC  amd64

ok

2018-07-28: I created this page.