ABC80 on Multicomp II-c
Project: try to get abc80 to fit in a Multcomp II-c board
back to multicomp II-c, main abc80 page.
local links
C2 board, C3 board,
History
2021-10-03: I re-created this page on my self-hosted web server.
2020-11-05: bb - sdb5 - abc80-18 - without piob I can get the design to fit - barely:
tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-18/output_files/abc80.fit.summary Fitter Status : Successful - Thu Nov 5 10:39:28 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 4,544 / 4,608 ( 99 % ) Total combinational functions : 4,496 / 4,608 ( 98 % ) Dedicated logic registers : 844 / 4,608 ( 18 % ) Total registers : 844 Total pins : 56 / 89 ( 63 % ) Total virtual pins : 0 Total memory bits : 65,536 / 119,808 ( 55 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 2 / 2 ( 100 % ) however, without the basic rom this is kind of useless. If I enable the basic rom I go over the limits: tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-18/output_files/abc80.fit.summary Fitter Status : Failed - Thu Nov 5 10:47:28 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 4,809 / 4,608 ( 104 % ) Total combinational functions : 4,509 / 4,608 ( 98 % ) Dedicated logic registers : 849 / 4,608 ( 18 % ) Total registers : 849 Total pins : 56 / 89 ( 63 % ) Total virtual pins : 0 Total memory bits : 196,608 / 119,808 ( 164 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 2 / 2 ( 100 % )
so disable that, and enable dos rom
tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-18/output_files/abc80.fit.summary Fitter Status : Successful - Thu Nov 5 10:51:43 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 4,524 / 4,608 ( 98 % ) Total combinational functions : 4,490 / 4,608 ( 97 % ) Dedicated logic registers : 845 / 4,608 ( 18 % ) Total registers : 845 Total pins : 56 / 89 ( 63 % ) Total virtual pins : 0 Total memory bits : 98,304 / 119,808 ( 82 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 2 / 2 ( 100 % )
fits, but is also useless.
2020-11-05: bb - sdb5 - I tested the .svf file I generated on c1 last night. It works - I get a test screen with text and colors, and the colors are correct. Setting .testpattern to '1' in the video instance in abc80.v gives me a moire grey background. Fitter summary:
tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-de1-18/output_files/abc80.fit.summary Fitter Status : Successful - Thu Nov 5 09:56:52 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 92 / 4,608 ( 2 % ) Total combinational functions : 88 / 4,608 ( 2 % ) Dedicated logic registers : 49 / 4,608 ( 1 % ) Total registers : 49 Total pins : 66 / 89 ( 74 % ) Total virtual pins : 0 Total memory bits : 0 / 119,808 ( 0 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 1 / 2 ( 50 % )
ok, but I still need to fix the flash / ROM thing
2020-11-04: c1 - ada2p4 - abc80-de1-18 - eliminating the sound part allows me to remove pll2, which is the only part that uses the 24 MHz clock, now things look up:
tingo@kg-core1$ more abc80-de1-18/output_files/abc80.fit.summary Fitter Status : Successful - Wed Nov 4 20:29:46 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 293 / 4,608 ( 6 % ) Total combinational functions : 284 / 4,608 ( 6 % ) Dedicated logic registers : 139 / 4,608 ( 3 % ) Total registers : 139 Total pins : 66 / 89 ( 74 % ) Total virtual pins : 0 Total memory bits : 29,456 / 119,808 ( 25 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 1 / 2 ( 50 % )
interesting.
2020-11-04: bb - sdb5 - abc80-de1-18 - initial test
tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-de1-18/output_files/abc80.fit.summary Fitter Status : Failed - Wed Nov 4 17:42:05 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 8,093 / 4,608 ( 176 % ) Total combinational functions : 7,470 / 4,608 ( 162 % ) Dedicated logic registers : 1,637 / 4,608 ( 36 % ) Total registers : 1637 Total pins : 71 / 89 ( 80 % ) Total virtual pins : 0 Total memory bits : 100,352 / 119,808 ( 84 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 2 / 2 ( 100 % )
memory bits ok.
2020-11-04: bb - sdb5 - abc80-18 - without cfram, printer, dosrom, basicrom I get closer
tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-18/output_files/abc80.fit.summary Fitter Status : Failed - Wed Nov 4 16:09:25 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 5,150 / 4,608 ( 112 % ) Total combinational functions : 4,725 / 4,608 ( 103 % ) Dedicated logic registers : 1,006 / 4,608 ( 22 % ) Total registers : 1006 Total pins : 56 / 89 ( 63 % ) Total virtual pins : 0 Total memory bits : 69,632 / 119,808 ( 58 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 2 / 2 ( 100 % )
I need to implement the SRAM as RAM if this is going to work.
2020-11-04: bb - sdb5 - abc80-18 - ROM sizes
abcbasic.mif 16384 x 8 (131072 bits) abcdos.mif 4096 x 8 (32768 bits) basic80.mif 256 x 16 (4096 bits) cfram.mif 2048 x 8 (16384 bits) chargen.mif 2048 x 8 (16384 bits) keyboard.mif 2048 x 8 (16384 bits) mmu.mif 1024 x 16 (16384 bits) printer.mif 512 x 8 (4096 bits) videoram.mif 2048 x 8 (16384 bits)
in total 122880 bits, or 120 kbits. Plus the 16 kbyte abcbasic (128 kbits). Will it fit into the C2 board? remove: cfram, printer - gives 102400 (100 kbits)
2020-11-04: bb - sdb5 - testing the abc80-18 project. After commenting out lots of pins, I get it to build:
tingo@kg-bsbox:/zs/tingo/personal/projects/fpga/Altera/c2/multicomp_II-c$ more abc80-18/output_files/abc80.fit.summary Fitter Status : Failed - Wed Nov 4 14:26:36 2020 Quartus II 64-Bit Version : 13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition Revision Name : abc80 Top-level Entity Name : abc80 Family : Cyclone II Device : EP2C5T144C8 Timing Models : Final Total logic elements : 5,084 / 4,608 ( 110 % ) Total combinational functions : 4,708 / 4,608 ( 102 % ) Dedicated logic registers : 998 / 4,608 ( 22 % ) Total registers : 998 Total pins : 56 / 89 ( 63 % ) Total virtual pins : 0 Total memory bits : 233,472 / 119,808 ( 195 % ) Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % ) Total PLLs : 2 / 2 ( 100 % )
unfortunately, still to big to fit.